35.3.1.2. INTEGER ARITHMETICAL ON ALPHA
Alpha Operate Format
+-------------------------+------------------------+
| 31..26 Opcode | 31..26 Opcode |
| 25..21 Ra | 25..21 Ra |
| 20..16 Rb | 20..13 LIT |
| 15..13 SBZ | 12 1 |
| 12 0 | 11..5 Function |
| 11..5 Function | 4..0 Rc |
| 4..0 Rc | |
+-------------------------+------------------------+
Longword Add
ADDL Ra.rq,Rb.rq,Rc.wq !Operate Format
ADDL Ra.rq,#b.ib,Rc.wq !Operate Format
Rc <- SEXT( (Rav + Rbv)<31:0>)
/V Integer Overflow Enable
Quadword Add
ADDQ Ra.rq,Rb.rq,Rc.wq !Operate Format
ADDQ Ra.rq,#b.ib,Rc.wq !Operate Format
Rc <- Rav + Rbv
/V Integer Overflow Enable
ADDL 10.00
ADDL/V 10.40
ADDQ 10.20
ADDQ/V 10.60
// -----------------------------------------------------------------
Longword Subtract
SUBL Ra.rq,Rb.rq,Rc.wq !Operate Format
SUBL Ra.rq,#b.ib,Rc.wq !Operate Format
Rc <- SEXT((Rav - Rbv)<31:0>)
/V Integer Overflow Enable
Quadword Subtract
SUBQ Ra.rq,Rb.rq,Rc.wq !Operate Format
SUBQ Ra.rq,#b.ib,Rc.wq !Operate Format
Rc <- Rav - Rbv
/V Integer Overflow Enable
SUBL 10.09
SUBL/V 10.49
SUBQ 10.29
SUBQ/V 10.69
// -----------------------------------------------------------------
Scaled Longword Add
S4ADDL Ra.rq,Rb.rq,Rc.wq !Operate Format
S4ADDL Ra.rq,#b.ib,Rc.wq !Operate Format
S8ADDL Ra.rq,Rb.rq,Rc.wq !Operate Format
S8ADDL Ra.rq,#b.ib,Rc.wq !Operate Format
S4ADDL:
Rc <- SEXT (Rav * 4 + Rbv)<31:0>)
S8ADDL:
Rc <- SEXT( (Rav * 8 + Rbv)<31:0>)
Scaled Longword Subtract
S4SUBL Ra.rq,Rb.rq,Rc.wq !Operate Format
S4SUBL Ra.rq,#b.ib,Rc.wq !Operate Format
S8SUBL Ra.rq,Rb.rq,Rc.wq !Operate Format
S8SUBL Ra.rq,#b.ib,Rc.wq !Operate Format
S4SUBL:
Rc <- SEXT (Rav * 4 - Rbv)<31:0>)
S8SUBL:
Rc <- SEXT( (Rav * 8 - Rbv)<31:0>)
Scaled Quadword Add
S4ADDQ Ra.rq,Rb.rq,Rc.wq !Operate Format
S4ADDQ Ra.rq,#b.ib,Rc.wq !Operate Format
S8ADDQ Ra.rq,Rb.rq,Rc.wq !Operate Format
S8ADDQ Ra.rq,#b.ib,Rc.wq !Operate Format
S4ADDQ:
Rc <- Rav * 4 + Rbv
S8ADDQ:
Rc <- Rav * 8 + Rbv
Scaled Quadword Subtract
S4SUBQ Ra.rq,Rb.rq,Rc.wq !Operate Format
S4SUBQ Ra.rq,#b.ib,Rc.wq !Operate Format
S8SUBQ Ra.rq,Rb.rq,Rc.wq !Operate Format
S8SUBQ Ra.rq,#b.ib,Rc.wq !Operate Format
S4ADDQ:
Rc <- Rav * 4 - Rbv
S8ADDQ:
Rc <- Rav * 8 - Rbv
S4ADDL 10.02
S4SUBL 10.0B
S4ADDQ 10.22
S4SUBQ 10.2B
S8ADDL 10.12
S8SUBL 10.1B
S8ADDQ 10.32
S8SUBQ 10.3B
// -----------------------------------------------------------------
Longword Multiply
MULL Ra.rq,Rb.rq,Rc.rq !Operate Format
MULL Ra.Rq,#b.ib,Rc.wq !Operate Format
Rc <- SEXT((Rav*Rbv)<31:0>)
Quadword Multiply
MULQ Ra.rq,Rb.rq,Rc.rq !Operate Format
MULQ Ra.Rq,#b.ib,Rc.wq !Operate Format
Rc <- Rav * Rbv (Signed)
Unsigned Quadword Multiply High
UMULH Ra.rq,Rb.rq,Rc.rq !Operate Format
UMULH Ra.Rq,#b.ib,Rc.wq !Operate Format
Rc <- {Rav *U Rbv} <127:64>
MULL 13.00
MULL/V 13.40
MULQ 12.20
MULQ/V 13.60
UMULH 13.30
OTHER OPERATION IMPLEMENTATION
DIV not exits on Alpha and Realized as Library Functions.
It's because of High-Speed RISC Architecture..
// ----------------------------------------------------------------------
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