35.3.2.6. INTEGER LOGICAL ON 68K

	
	
Code			Size	Mnemonic		Description
1101nnn0ss<-EA->	B,W,L	AND	,Dn		 AND Dn -> Dn	
1101nnn1ss<-EA->	B,W,L	AND	Dn,		Dn AND  -> 
00000010ss<-EA->	B,W,L	ANDI	#im,	#im AND  -> 

1011nnn1ss<-EA->	B,W,L	EOR	Dn,		Dn XOR  -> 
00001010ss<-EA->	B,W,L	EORI	#im,	#im XOR  -> 

01000110ss<-EA->	B,W,L	NOT			NOT  -> 

1000nnn0ss<-EA->	B,W,L	OR	,Dn		 OR Dn -> Dn
1000nnn1ss<-EA->	B,W,L	OR	Dn,		Dn OR  -> 
00000000ss<-EA->	B,W,L	ORI	#im,	#im OR  -> 




@	
35.3.2.7.	INTEGER LOGICAL ON Z80



Operation		Description			Code
AND	r		A <- A AND r			A0+r
AND	n		A <- A AND n			E6 n
AND	(ii+n)		A <- A AND (ii+n)		ii A6 n


CPL			A <- A XOR 255  		2F
			(i.e. NOT A)		

OR	r		A <- A OR r			B0+r
OR	n		A <- A OR n			F6 n
OR	(ii+n)		A <- A OR (ii+n)		ii B6 n

XOR	r		A <- A XOR r			A8+r
XOR	n		A <- A XOR n			EE n
XOR	(ii+n)		A <- A XOR (ii+n)		ii AE n