35.3.3.1. INTEGER SHIFTS/ROTATES ON SPARC

SPARC format 3
+-----------------------+------------------------+------------------------+
| 31..30	10      | 31..30	10	 |  31..30	10        |
| 29..25	rd	| 29..25	rd       |  29..25	rd        |
| 24..19	op3	| 24..19	op3      |  24..19	op3	  |
| 18..14	rs1	| 18..14	rs1      |  18..14	rs1	  |
| 13		0	| 13		1        |  13		1         |
| 12		x	| 12		x=0	 |  12		x=1	  |
| 11..5		---	| 11..5		----     |  11..6	---	  | 
| 4..0		rs2	| 4..0		shcnt32  |  5..0	shcnt64   |
+-----------------------+------------------------+------------------------+	

	x	Shift count
	0	bits 4..0 of r[rs2]
	1	bits 5..0 of r[rs2]



	Opcode		Op3	  x	Operation		
	sll		10 0101	  0	Shift Left Logical 32 bit
	srl		10 0110   0	Shift Right Logical  32 bit
	sra		10 0111   0	Shift Right Arithmetic 32 bit
	sllx		10 0101   1	Shift Left Logical 64 bit
	srlx		10 0110	  1	Shift Right Logical 64 bit
	srax		10 0111	  1	Shift Right Arithmetic 64 bit


Note:
	sra	rs1,0,rd	can be used for convert 32-bit value
to 64 bit with sign extend.
	srl	rs1,0,rd	used for clear upper 32-bit of r[rd]

	

op	reg(rs1),reg(rs2),reg(rd)
op	reg(rs1),shcnt32/64,reg(rd)


r[d] <-  r[rs1] _SHIFT_ low_bits(r[rs2])
r[d] <-  r[rs1] _SHIFT_ shcnt32/64




// ----------------------------------------------------------------------