35.3.3.8. INTEGER SHIFTS/ROTATES ON X86

	(Rotate through carry Right)
RCR	r/m8,1			D0/3
RCR	r/m8,CL			D2/3
RCR	r/m8,imm8		C0/3    ib
RCR	r/m16,1			D1/3
RCR	r/m16,CL		D3/3
RCR	r/m16,imm8		C1/3	ib
RCR	r/m32,1			D1/3
RCR	r/m32,CL		D3/3	
RCR	r/m32,imm8		C1/3	ib	
	
	+---> SRC ---> CF ---+
	|                    |
	+<-------------------+


	(Rotate throught carry Left)
RCL	r/m8,1			D0/2
RCL	r/m8,CL			D2/2
RCL	r/m8,imm8		C0/2    ib
RCL	r/m16,1			D1/2
RCL	r/m16,CL		D3/2
RCL	r/m16,imm8		C1/2	ib
RCL	r/m32,1			D1/2
RCL	r/m32,CL		D3/2	
RCL	r/m32,imm8		C1/2	ib	


	+<--- SRC <--- CF <--+
	|                    |
	+------------------->+


	(Rotate Right)
ROR	r/m8,1			D0/1
ROR	r/m8,CL			D2/1
ROR	r/m8,imm8		C0/1    ib
ROR	r/m16,1			D1/1
ROR	r/m16,CL		D3/1
ROR	r/m16,imm8		C1/1	ib
ROR	r/m32,1			D1/1
ROR	r/m32,CL		D3/1	
ROR	r/m32,imm8		C1/1	ib	

	  +---> SRC --->+---> CF
	  |             |
          +<------------+


	(Rotate Left)
ROL	r/m8,1			D0/0
ROL	r/m8,CL			D2/0
ROL	r/m8,imm8		C0/0    ib
ROL	r/m16,1			D1/0
ROL	r/m16,CL		D3/0
ROL	r/m16,imm8		C1/0	ib
ROL	r/m32,1			D1/0
ROL	r/m32,CL		D3/0	
ROL	r/m32,imm8		C1/0	ib	


	  +---- SRC <---+---> CF
	  |             |
          +------------>+


	(SHift Right Logical)
SHR	r/m8,1			D0/5
SHR	r/m8,CL			D2/5
SHR	r/m8,imm8		C0/5    ib
SHR	r/m16,1			D1/5
SHR	r/m16,CL		D3/5
SHR	r/m16,imm8		C1/5	ib
SHR	r/m32,1			D1/5
SHR	r/m32,CL		D3/5	
SHR	r/m32,imm8		C1/5	ib	

	0 >--> SRC ----> CF


	(Shift Left Logical)
SHL	r/m8,1			D0/4
SHL	r/m8,CL			D2/4
SHL	r/m8,imm8		C0/4    ib
SHL	r/m16,1			D1/4
SHL	r/m16,CL		D3/4
SHL	r/m16,imm8		C1/4	ib
SHL	r/m32,1			D1/4
SHL	r/m32,CL		D3/4	
SHL	r/m32,imm8		C1/4	ib	


	CF <--- SRC  <---< 0


	(Shift Right Arithmetical)
SAR	r/m8,1			D0/7
SAR	r/m8,CL			D2/7
SAR	r/m8,imm8		C0/7    ib
SAR	r/m16,1			D1/7
SAR	r/m16,CL		D3/7
SAR	r/m16,imm8		C1/7	ib
SAR	r/m32,1			D1/7
SAR	r/m32,CL		D3/7	
SAR	r/m32,imm8		C1/7	ib	

	+---> SRC ----> CF
	|    |
        +<---+
	   high bit	


	(Shift Left Arithmetical)
SAL	r/m8,1			D0/4
SAL	r/m8,CL			D2/4
SAL	r/m8,imm8		C0/4    ib
SAL	r/m16,1			D1/4
SAL	r/m16,CL		D3/4
SAL	r/m16,imm8		C1/4	ib
SAL	r/m32,1			D1/4
SAL	r/m32,CL		D3/4	
SAL	r/m32,imm8		C1/4	ib	

Note:	SAL and SHL are synonims



	(Double Precension Shift Left)
SHLD	r/m16,r16,imm8		0F A4
SHLD	r/m32,r32,imm8		0F A4
SHLD	r/m16,r16,CL		0F A5
SHLD	r/m32,r32,CL		0F A5
	
	CF <--- r <--- r/m <--- 0


	(Double Precension Shift Right)
SHRD	r/m16,r16,imm8		0F AC
SHRD	r/m32,r32,imm8		0F AC
SHRD	r/m16,r16,CL		0F AD
SHRD	r/m32,r32,CL		0F AD


	0 ---> r/m ---> r -->  CF