35.3.4.4. INTEGER LOAD/STORE ON MIPS

	
+------------------------------+
|	Len	Value
|	6	opcode
|	5	base
|	5	rt
|	16	offset
+------------------------------+


Command				xx	MIPS
LB	rt,offset(base)		10 0000	  I	Load Byte
LBU	rt,offset(base)		10 0100	  I	Load Byte Unsigned
LD	rt,offset(base)		11 0111	 III	Load Doubleword
LDL	rt,offset(base)		01 1010	 III	Load Doubleword Left
LDR	rt,offset(base)		01 1011	 III	Load Doubleword Right
LH	rt,offset(base)		10 0001	  I	Load Halfword
LHU	rt,offset(base)		10 0101	  I	Load Halfword Unsigned
LW	rt,offset(base)		10 0011	  I	Load Word
LWL	rt,offset(base)		10 0010	  I     Load Word Left
LWR	rt,offset(base)		10 0110	  I     Load Word Right
LWU	rt,offset(base)		10 0111	 III	Load Word Unsigned



SB	rt,offset(base)		10 1000	  I	Store Byte
SD	rt,offset(base)		11 1111	  III	Store Doubleword
SDL	rt,offset(base)		10 1100	  III	Store Doubleword Left
SDR	rt,offset(base)		10 1101	  III	Store Doubleword Right
SH	rt,offset(base)		10 1001	  I	Store Halfword
SW	rt,offset(base)		10 1011	  I	Store Word
SWL	rt,offset(base)		10 1010	  I	Store Word Left
SWR	rt,offset(base)		10 1110	  I	Store Word Right


(Semaphore operations)
LL	rt,offset(base)		11 0000	  II	Load Linked Word
LLD	rt,offset(base)		11 0100	  III	Load Linked Doubleword
SC	rt,offset(base)		11 1000	  II	Store Conditional Word
SCD	rt,offset(base)		11 1100	  III	Store Conditional Doubleword



(Misc)
PREFETCH


(Immediate Load)


LUI	- Load Upper Immediate


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