35.3.8.1. INTEGER CONDITIONAL MOVES AND SETS ON SPARC

SPARC format 4
+-----------------------+------------------------+
| 31..30	10      | 31..30	10	 |
| 29..25	rd	| 29..25	rd       |
| 24..19	op3	| 24..19	op3      | 
| 18		cc2	| 18		cc2	 |
| 17..14	cond	| 17..14	cond	 |
| 13		0	| 13		1        |
| 12		cc1	| 12		cc1	 |
| 11		cc0	| 11		cc0	 |
| 10..5		---	| 10..0		simm11   |
| 4..0		rs2	|	                 |
+-----------------------+------------------------+	


	cc2 cc1 cc0	Conditional code
	1   0    0	icc
	1   1    0      xcc

Opcode		Op3	cond		Operation
mova		101100	1000		Move Always
movn		101100	0000		Move Never
movne		101100	1001		Move if Not Equal	
move		101100	0001		Move if Equal
movg		101100	1010		Move if Greater
movle		101100  0010		Move if Less or Equal
movge		101100	1011		Move if Greater or Equal
movl		101100  0011		Move if Less
movgu		101100  1100		Move if Greater Unsigned
movleu		101100  0100		Move if Less or Equal Unsigned
movcc		101100  1101		Move if Carry Clear (Greater Equal Unsg)
movcs		101100  0101		Move if Carry Set (Less Unsigned)
movpos		101100  1110		Move if Positive
movneg		101100  0110		Move if Negative
movvc		101100  1111		Move if Overflow Clear
movvs		101100  0111		Move if Overflow Set


	A		1
	N		0
	NE		not Z
	E		Z
	G		not (Z or (N xor V))
	LE		Z or (N xor V)
	GE		not (N xor V)
	L		N xor V
	GU		not (C or Z)
	LEU		(C or Z)
	CC		not C
	CS		C
	POS		not N
	NEG		N
	VC		not V
	VS		V


ops	i_or_x_cc,reg(rs2),reg(rd)
ops	i_or_x_cc,imm11,reg(rd)

	if (condition)
	{
		r[rs2] -> r[rd]			// Non Immediate
		sign_extend(simm11) -> r[rd]	// Immediate
	}

Synonims:
	movne		movnz
	move		movz
	movcc		movgeu
	movcs		movlu


SPARC format 3
+-----------------------+------------------------+
| 31..30	10      | 31..30	10	 |
| 29..25	rd	| 29..25	rd       |
| 24..19	op3	| 24..19	op3      | 
| 18..14	rs1	| 18..14	rs1	 |
| 13		0	| 13		1        |
| 12..10	rcond	| 12..10	rcond	 |
| 9..5		---	| 9..0		simm10   |
| 4..0		rs2	|	                 |
+-----------------------+------------------------+	


Opcode		Op3	cond	Operation			Condition
movrz		101111	001	Move if Register Zero		r[rs1] == 0	
movrlez		101111  010	Move if Register <= 0		r[rs1] <= 0
movrlz		101111  011	Move if Register <  0		r[rs1] <  0
movrnz		101111  101	Move if Register != 0		r[rs1] != 0
movrgz		101111  110	Move if Register >  0		r[rs1] >  0
movrgez		101111  111	Move if Register >= 0		r[rs1] >= 0


	if (condition)
	{
		r[rs2] -> r[rd]			// Not Immediate
		sign_ext(simm10) -> r[rd]	// Immediate
	}


Synonims:
	movrne		movrnz
	movre		movrz


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