35.3.4.1. INTEGER LOAD/STORE ON SPARC




SPARC format 3
+-----------------------+------------------------+
| 31..30	11      | 31..30	11	 |
| 29..25	rd	| 29..25	rd       |
| 24..19	op3	| 24..19	op3      | 
| 18..14	rs1	| 18..14	rs1      |
| 13		0	| 13		1        |
| 12..5		---	| 12..0		simm13   |
| 4..0		rs2	|	                 |
+-----------------------+------------------------+	


	Opcode		Op3		Operation
	ldsb		00 0101		Load Signed Byte
	ldsh		00 1010		Load Signed Halfword
	ldsw		00 1000		Load Signed Word 
	ldub		00 0001		Load Unsigned Byte
	lduh		00 0010		Load Unsigned Halfword
	lduw		00 0000		Load Unsigned word
	ldx		00 1011		Load Extended Word
	ldd		00 0011		Load Doubleword

	All Data Must be aligned..

ldXX	[address],reg(rd)

	address = r[rs1]+r[rs2]			// Direct
	address = r[rs1]+sign_ext(simm13)	// Immediate
	r[rd] <- memory[address]

Aliases:
	lduw		ld


	Opcode		Op3		Operation
	ldstub		00 1101		Load-Store Unsigned Byte

ldstub	[address],reg(rd)

	address = r[rs1]+r[rs2]			// Direct
	address = r[rs1]+sign_ext(simm13)	// Immediate
	r[rd] <- memory[address]
	memory[address] <- 0xffh


	Opcode		Op3		Operation
	stb		00 0101		Store Byte
	sth		00 0110		Store Halfword
	stw		00 0100		Store Word
	stx		00 1110		Store Extended Word
	std		00 0111		Store Doubleword

stXX	reg(rd),[address]		

Aliases:
	stb		stub	stsb
	sth		stuh	stsh
	stw		stuw	stsw

// ----------------------------------------------------------------------


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