4.5.1. ÑÒÎÈÌÎÑÒÜ ËÎÃÈ×ÅÑÊÈÕ ÝËÅÌÅÍÒÎÂ
 òàáëèöû ïðèâèäåíû ïðèìåðíûå òèïîâûå ïàðàìåòðû ñòîèìîñòè ëîãè÷åñêèõ ýëåìåíòîâ:
(äëÿ CMOS):
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Ýëåìåíò Çàäåðæêà Ïëîùàäü Òðàíçèñòîðîâ
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NOT 1T <1S 2
NAND2 2T 1S 4
NOR2 2T 1S 4
NAND3 3T 1.5S 6
NOR3 3T 1.5S 6
Buffer 2T 1S 4
AND2 >2T 2S 6
OR2 >2T 2S 6
XOR2 2T 3S 8
XNOR2 2T 3S 8
AOI4 >2T 3S 8
OAI4 >2T 3S 8
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Ïëîùàäü ìåíüøå ÷åì êîë-âî òðàíçèñòîðîâ ïîòîìó ÷òî îíà îïòèìèçèðîâàííà.
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